In the field of data communications a transceiver, or modem, is used to convey information from one location to another. Digital Subscriber Line (DSL) technology now enables transceivers to communicate rapidly large amounts of data. Transceivers communicate by modulating a baseband signal carrying digital data, converting the modulated digital data signal to an analog signal, and transmitting the analog signal over a conventional copper wire pair using techniques that are known in the art. These known techniques include mapping the information to be transmitted into a multi-dimensional multilevel signal space constellation and slicing the received constellation to recover the transmitted information. The constellation can include both analog and digital information or only digital information.
In the above mentioned communications environment, a control transceiver is located at a telephone company central office location. Connected to the transceiver via a conventional copper wire pair is a remote transceiver. The remote transceiver resides at a location, such as a residence or a business location. Before the central office transceiver can exchange information with the remote transceiver, clock timing and synchronization between the central office transceiver and the network master clock must be established.
Timing and synchronization are fundamental to any digital transmission and switching network. In a digital transmission system, timing is encoded with the transmitted signal using the network master clock, such as a T1 or E1 clock. As such, the central office transceiver must recover system timing and synchronization from this system clock. Once frequency synchronization between the central office transceiver and the network clock is achieved, the receiver in the transceiver can identify frame boundaries of the receive and transmit data signal.
In the aforementioned communications environment, synchronization is provided in a master-slave relationship such that the network, T1 for example, timing is at the highest level allowing it to provide timing to all transmission systems that are connected to the network. Each transceiver connected to the network must be synchronized to the network system clock.
A common technique for achieving timing synchronization between the network clock and the central office transceiver is based upon the use of an external framer which performs bit/pulse stuffing. In this arrangement the aggregate bit stream has a higher data rate than the input data rate from the network. This arrangement allows the accommodation of additional stuffing and framing bits. The stuffing bits are inserted or deleted in the incoming data stream until the clock rate is equal to that of the input rate, or its frequency is locked to the system clock. The stuffed bits are inserted at fixed locations of each frame so that they can be identified and removed at the remote transceiver. Unfortunately, this technique requires the use of additional bits that consume bandwidth and reduce the aggregate data rate.
Another known technique for achieving network timing synchronization is to lock the central office transceiver to the system clock using a voltage controlled oscillator (VCO) in conjunction with a phase locked loop (PLL). In this arrangement, timing lock is achieved by tuning the local frequency of a VCO using an additional phase and frequency measurement circuit that adjusts the transceiver reference frequency to lock a local reference clock to the system clock. This is achieved by measuring the offset between the system clock and a reference clock in order to develop an error signal to supply to the PLL which in turn drives the VCO. This technique uses additional circuitry that adds system cost and complexity.
Thus, it would be desirable to allow a central office transceiver to achieve timing lock and synchronization to a system clock without the need to transmit additional bits or without requiring costly additional circuitry.